set-5

201. Property of locality of reference may fail if a program has

1. Many conditional jumps
2. Many operands
3. Many unconditional jumps
4. All of the above

202. In Reverse Polish notation, expression AB+CD is written as

1. AB*CD++
2. ABCD+
3. A*BCD++
4. ABCD+

203. SIMD represents an organization that______.

1. Refers to a computer system capable of processing several programs at the same time.
2. Represents organization of single computer containing a control unit, processor unit and a memory unit.
3. Includes many processing units under the supervision of a common control unit
4. None of the above

204. Floating point representation is used to store

1. Boolean values
2. Real integers
3. Whole numbers
4. Integers

205. Suppose that a bus has 16 data lines and required 4 cycles of 250 nano seconds each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?

1. 1 Megabyte/sec
2. 8 Megabytes/sec
3. 4 Megabytes/sec
4. 2 Megabytes/sec

206. Assembly language

1. Uses alphabetic codes in place of binary numbers used in machine language
2. Is the easiest language to write programs
3. Need not be translated into machine language
4. None of the above

207. In computers, subtraction is generally carried out by

1. 9’s complement
2. 1’s complement
3. 10’s complement
4. 2’s complement

208. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to

1. The time it takes for the platter to make a full rotation
2. The time it takes for the read-write head to move into position over the appropriate track
3. The time it takes for the platter to rotate the correct sector under the head
4. None of the above

209. What characteristic of RAM memory makes it not suitable for permanent storage?

1. Too slow
2. It is volatile
3. Unreliable
4. Too bulky

210. Computers use addressing mode techniques for:

1. Giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
2. To reduce no. of bits in the field of instruction
3. Specifying rules for modifying or interpreting address field of the instruction
4. All the above

211. The circuit used to store one bit of data is known as

1. Register
2. Decoder
3. Encoder
4. Flip-flop

212. (2FAOC)16 is equivalent to:

1. (195 084)10
2. Both A and B
3. (001011111010 0000 1100)
4. None of these

213. The average time required to reach a storage location in memory and obtain its contents is called the:

1. Seek time
2. Turnaround time
3. Access time
4. Transfer time

214. Which of the following is not a weighted code?

1. Decimal number system
2. Binary Number System
3. Excess-3 code
4. None of the above

215. ______ register keeps track of the instructions stored in program stored in memory.

1. AR (Address Register)
2. PC (Program Counter)
3. XR (Index Register)
4. AC (Accumulator)

216. The addressing mode used in an instruction of the form ADD X Y, is

1. Absolute
2. Index
3. Indirect
4. None of the above

217. In a memory-mapped I/O system, which of the following will not be there?

1. LDA
2. ADD
3. IN
4. OUT

218. In a vectored interrupt:

1. The branch address is assigned to a fixed location in memory
2. The interrupting source supplies the branch information to the processor through an interrupt vector
3. The branch address is obtained from a register in the processor
4. None of the above

219. Cache memory acts between

1. CPU and RAM
2. CPU and HARDSIK
3. RAM and ROM
4. None of the above

220. Write Through technique is used in which memory for updating the data:

1. Virtual memory
2. Auxiliary memory
3. Main memory
4. Cache memory

221. Generally Dynamic RAM is used as main memory in a computer system as it

1. Consumes less power
2. Has lower cell density
3. Has higher speed
4. Needs refreshing circuitry

222. In signed-magnitude binary division, if the dividend is (11100)₂ and divisor is (10011)₂ then the result is

1. (00100)₂
2. (11001)₂
3. (10100)₂
4. (01100)₂

223. Virtual memory consists up:

1. Static RAM
2. Magnetic memory
3. Dynamic RAM
4. None of the above

224. In a program using subroutine call instruction, it is necessary

1. Initialize program counter
2. Reset the microprocessor
3. Clear the accumulator
4. Clear the instruction register

225. When CPU is executing a Program that is part of the Operating System, it is said to be in

1. Interrupt mode
2. Half mode
3. System mode
4. Simplex mode

226. A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit

1. D = T . Qn
2. D = T . Qn
3. D = T
4. D = TAQn

227. Logic X-OR operation of (4ACO) H& (B53F) H results

1. AACB
2. FFFF
3. 0000
4. ABCD

228. An n-bit microprocessor has

1. n-bit program counter
2. n-bit ALU
3. n-bit address register
4. n-bit instruction register

229. Cache memory works on the principle of:

1. Locality of data
2. Locality of reference
3. Locality of memory
4. Locality of reference and memory

230. The main memory in a Personal Computer (PC) is made of:

1. Cache memory
2. Dynamic RAM
3. Static RAM
4. Both 2 and 3

231. The circuit converting binary data into decimal is

1. Encoder
2. Decoder
3. Multiplexer
4. Code converter

232. PSW is saved in stack when there is a

1. Interrupt recognized
2. Execution of CALL instruction
3. Execution of RST instruction
4. All of these

233. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is:

1. Decoder
2. Multiplexer
3. Encoder
4. Demultiplexer

234. In which addressing mode the operand is given explicitly in the instruction:

1. Absolute
2. Indirect
3. Immediate
4. Direct

235. The gray code equivalent of (1011)₂ is

1. 1101
2. 1110
3. 1010
4. 1111

236. A system program that translates and executes an instruction simultaneously is:

1. Compiler
2. Assembler
3. Interpreter
4. Operating system

237. When necessary, the results are transferred from the CPU to main memory by

1. I/O devices
2. Shift registers
3. CPU
4. None of the above

238. A successive A/D converter is:

1. A medium speed converter
2. A low speed converter
3. A high-speed converter
4. None of these

239. The memory unit that communicates directly with the CPU is called the

1. Main memory
2. Shared memory
3. Secondary memory
4. Auxiliary memory

240. The average time required to reach a storage location in memory and obtains its content is called:

1. Latency time
2. Turnaround time
3. Access time
4. Response time

241. A k-bit field can specify:

1. 3(^k) register
2. K(^2) register
3. 2(^k) register
4. K(^3) register

242. The time interval between the adjacent bits is called:

1. Word-time
2. Turnaround time
3. Bit-time
4. Slice time

243. A group of bits that tell the computer to perform a specific operation is known as:

1. Instruction code
2. Accumulator
3. Micro–operation
4. Register

244. The load instruction is mostly used to designate a transfer from memory to a processor register known as:

1. Accumulator
2. Program counter
3. Instruction register
4. Memory address register

245. The communication between the components in a microcomputer takes place via:

1. I/O bus
2. Address bus
3. Data bus
4. Control lines

246. An instruction pipeline can be implemented by means of:

1. LIFO buffer
2. Stack
3. FIFO buffer
4. None of above

247. Data input command is a just the opposite of a:

1. Test command
2. Data output
3. Control command
4. Data channel

248. The operation executed on data stored in registers is called:

1. Macro–operation
2. Bit-operation
3. Micro–operation
4. Byte-operation

249. MRI indicates:

1. Memory Reference Information
2. Memory Register Instruction
3. Memory Reference Instruction
4. Memory Register Information

250. Self-contained sequence of instructions that performs a given computational task is:

1. Function
2. Subroutine
3. Procedure
4. Routine