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LicenseComputer2. Digital-logic-and-microprocessorMCQsMcqs on Digital Logicset-6

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251. Which of the following is the faster logic?

  1. TTL\text{TTL}
  2. CMOS\text{CMOS}
  3. ECL\text{ECL}
  4. LSI\text{LSI}
Show me the answer

Answer: 3. ECL\text{ECL}

Explanation:

  • ECL (Emitter-Coupled Logic) is the fastest logic family due to its non-saturating operation.

252. If the input to a T-flip-flop is a 100 Hz signal, the final output of the three T-flip-flops in cascade is:

  1. 1000 Hz1000 \text{ Hz}
  2. 333 Hz333 \text{ Hz}
  3. 500 Hz500 \text{ Hz}
  4. 12.5 Hz12.5 \text{ Hz}
Show me the answer

Answer: 4. 12.5 Hz12.5 \text{ Hz}

Explanation:

  • Each T-flip-flop divides the frequency by 2, so three flip-flops divide the frequency by ( 2^3 = 8 ), resulting in ( 100 \text{ Hz} / 8 = 12.5 \text{ Hz} ).

253. Which of the following memory is volatile memory?

  1. ROM\text{ROM}
  2. PROM\text{PROM}
  3. RAM\text{RAM}
  4. EEPROM\text{EEPROM}
Show me the answer

Answer: 3. RAM\text{RAM}

Explanation:

  • RAM (Random Access Memory) is volatile, meaning it loses its data when power is turned off.

254. -8 is equal to the signed binary number:

  1. 1000100010001000
  2. 1000000010000000
  3. 0000100000001000
  4. 10000001000000
Show me the answer

Answer: 1. 1000100010001000

Explanation:

  • In 8-bit signed binary, -8 is represented as 10001000.

255. De Morgan’s first theorem shows the equivalence of:

  1. OR gate and Exclusive OR gate\text{OR gate and Exclusive OR gate}
  2. NOR gate and Bubbled AND gate\text{NOR gate and Bubbled AND gate}
  3. NOR gate and NAND gate\text{NOR gate and NAND gate}
  4. NAND gate and NOT gate\text{NAND gate and NOT gate}
Show me the answer

Answer: 2. NOR gate and Bubbled AND gate\text{NOR gate and Bubbled AND gate}

Explanation:

  • De Morgan’s first theorem states that ( \overline{A + B} = \overline{A} \cdot \overline{B} ), which is equivalent to a NOR gate being the same as a bubbled AND gate.

256. The digital logic family which has the lowest propagation delay time is:

  1. ECL\text{ECL}
  2. CMOS\text{CMOS}
  3. TTL\text{TTL}
  4. PMOS\text{PMOS}
Show me the answer

Answer: 1. ECL\text{ECL}

Explanation:

  • ECL (Emitter-Coupled Logic) has the lowest propagation delay among the given options.

257. The device which changes from serial data to parallel data is:

  1. Counter\text{Counter}
  2. Demultiplexer\text{Demultiplexer}
  3. Multiplexer\text{Multiplexer}
  4. Flip-flop\text{Flip-flop}
Show me the answer

Answer: 2. Demultiplexer\text{Demultiplexer}

Explanation:

  • A demultiplexer converts serial data into parallel data.

258. A device which converts BCD to Seven Segment is called:

  1. Encoder\text{Encoder}
  2. Multiplexer\text{Multiplexer}
  3. Decoder\text{Decoder}
  4. De-multiplexer\text{De-multiplexer}
Show me the answer

Answer: 3. Decoder\text{Decoder}

Explanation:

  • A BCD-to-Seven Segment decoder converts BCD input into the corresponding Seven Segment display output.

259. In a JK Flip-Flop, toggle means:

  1. Set Q=1 and Q‾=0\text{Set } Q = 1 \text{ and } \overline{Q} = 0
  2. Set Q=0 and Q‾=1\text{Set } Q = 0 \text{ and } \overline{Q} = 1
  3. Change the output to the opposite state\text{Change the output to the opposite state}
  4. No change in output\text{No change in output}
Show me the answer

Answer: 3. Change the output to the opposite state\text{Change the output to the opposite state}

Explanation:

  • Toggling in a JK Flip-Flop means changing the output to the opposite state (from 0 to 1 or from 1 to 0).

260. The access time of ROM using bipolar transistors is about:

  1. 1 sec1 \text{ sec}
  2. 1 psec1 \text{ psec}
  3. 1 msec1 \text{ msec}
  4. nsec\text{nsec}
Show me the answer

Answer: 4. nsec\text{nsec}

Explanation:

  • The access time of ROM using bipolar transistors is typically in the nanosecond (nsec) range.

261. The A/D converter whose conversion time is independent of the number of bits is:

  1. Dual slope\text{Dual slope}
  2. Parallel conversion\text{Parallel conversion}
  3. Counter type\text{Counter type}
  4. Successive approximation\text{Successive approximation}
Show me the answer

Answer: 2. Parallel conversion\text{Parallel conversion}

Explanation:

  • Parallel conversion A/D converters have a conversion time that is independent of the number of bits.

262. When signed numbers are used in binary arithmetic, which notation has a unique representation for zero?

  1. Sign-magnitude\text{Sign-magnitude}
  2. 2’s complement\text{2's complement}
  3. 1’s complement\text{1's complement}
  4. 9’s complement\text{9's complement}
Show me the answer

Answer: 2. 2’s complement\text{2's complement}

Explanation:

  • In 2’s complement representation, zero has a unique representation (all bits 0).

263. A hexadecimal odometer displays F52F. The next reading will be:

  1. F52FF52F
  2. F530F530
  3. F53FF53F
  4. F530F530
Show me the answer

Answer: 2. F530F530

Explanation:

  • The next reading after F52F is F530.

264. Most digital computers do not have floating-point hardware because:

  1. Floating-point hardware is costly\text{Floating-point hardware is costly}
  2. It is slower than software\text{It is slower than software}
  3. It is not possible to perform floating-point addition by hardware\text{It is not possible to perform floating-point addition by hardware}
  4. No specific reason\text{No specific reason}
Show me the answer

Answer: 1. Floating-point hardware is costly\text{Floating-point hardware is costly}

Explanation:

  • Floating-point hardware is expensive, so many systems rely on software for floating-point operations.

265. In digital ICs, Schottky transistors are preferred over normal transistors because of their:

  1. Lower propagation delay\text{Lower propagation delay}
  2. Lower power dissipation\text{Lower power dissipation}
  3. Higher propagation delay\text{Higher propagation delay}
  4. Higher power dissipation\text{Higher power dissipation}
Show me the answer

Answer: 1. Lower propagation delay\text{Lower propagation delay}

Explanation:

  • Schottky transistors have a lower propagation delay, making them faster.

266. The following switching functions are to be implemented using a Decoder:

( f_1 = \sum m(1, 2, 4, 8, 10, 14) )
( f_2 = \sum m(2, 5, 9, 11) )
( f_3 = \sum m(2, 4, 5, 6, 7) )
The minimum configuration of the decoder should be:

  1. 2−to−4 line2-to-4 \text{ line}
  2. 4−to−16 line4-to-16 \text{ line}
  3. 3−to−8 line3-to-8 \text{ line}
  4. 5−to−32 line5-to-32 \text{ line}
Show me the answer

Answer: 2. 4−to−16 line4-to-16 \text{ line}

Explanation:

  • A 4-to-16 line decoder is required to handle the given minterms.

267. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for a change of state is:

  1. 15 ns15 \text{ ns}
  2. 45 ns45 \text{ ns}
  3. 30 ns30 \text{ ns}
  4. 60 ns60 \text{ ns}
Show me the answer

Answer: 1. 15 ns15 \text{ ns}

Explanation:

  • In a synchronous counter, all flip-flops change state simultaneously, so the maximum delay is equal to the propagation delay of one flip-flop (15 ns).

268. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are:

  1. 11
  2. 44
  3. 22
  4. 88
Show me the answer

Answer: 4. 88

Explanation:

  • An 8-bit word requires 8 lines for writing into memory.

269. In a successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter’s output. This is done to:

  1. Improve the speed of operation\text{Improve the speed of operation}
  2. Reduce the maximum quantization error\text{Reduce the maximum quantization error}
  3. Increase the number of bits at the output\text{Increase the number of bits at the output}
  4. Increase the range of input voltage that can be converted\text{Increase the range of input voltage that can be converted}
Show me the answer

Answer: 2. Reduce the maximum quantization error\text{Reduce the maximum quantization error}

Explanation:

  • Adding an offset voltage of 1/2 LSB reduces the maximum quantization error.

270. The decimal equivalent of the binary number 11010 is:

  1. 2626
  2. 1616
  3. 3636
  4. 2323
Show me the answer

Answer: 1. 2626

Explanation:

  • The binary number 11010 converts to the decimal number 26.

271. The 1’s complement representation of the decimal number -17 using 8-bit representation is:

  1. 1110111011101110
  2. 1100110011001100
  3. 1101110111011101
  4. 0001000100010001
Show me the answer

Answer: 1. 1110111011101110

Explanation:

  • The 1’s complement of -17 is obtained by inverting all bits of the binary representation of 17.

272. The excess-3 code of the decimal number 26 is:

  1. 0100100101001001
  2. 1000100110001001
  3. 0101100101011001
  4. 0100110101001101
Show me the answer

Answer: 3. 0101100101011001

Explanation:

  • The excess-3 code of 26 is obtained by adding 3 to each digit and converting to binary.

273. How many AND gates are required to realize ( Y = CD + EF + G )?

  1. 44
  2. 33
  3. 55
  4. 22
Show me the answer

Answer: 2. 33

Explanation:

  • Three AND gates are required for the terms ( CD ), ( EF ), and ( G ).

274. How many select lines will a 16-to-1 multiplexer have?

  1. 44
  2. 55
  3. 33
  4. 11
Show me the answer

Answer: 1. 44

Explanation:

  • A 16-to-1 multiplexer requires 4 select lines (since ( 2^4 = 16 )).

275. How many flip-flops are required to construct a decade counter?

  1. 1010
  2. 44
  3. 33
  4. 22
Show me the answer

Answer: 2. 44

Explanation:

  • A decade counter counts from 0 to 9, requiring 4 flip-flops (since ( 2^4 = 16 \geq 10 )).

276. Which TTL logic gate is used for wired ANDing?

  1. Open collector output\text{Open collector output}
  2. Tristate output\text{Tristate output}
  3. Totem Pole\text{Totem Pole}
  4. ECL gates\text{ECL gates}
Show me the answer

Answer: 1. Open collector output\text{Open collector output}

Explanation:

  • Open collector outputs are used for wired ANDing because they allow multiple outputs to be connected together.

277. CMOS circuits consume power:

  1. Equal to TTL\text{Equal to TTL}
  2. Twice of TTL\text{Twice of TTL}
  3. Less than TTL\text{Less than TTL}
  4. Thrice of TTL\text{Thrice of TTL}
Show me the answer

Answer: 3. Less than TTL\text{Less than TTL}

Explanation:

  • CMOS circuits consume significantly less power than TTL circuits.

278. In a RAM, information can be stored:

  1. By the user, number of times\text{By the user, number of times}
  2. By the user, only once\text{By the user, only once}
  3. By the manufacturer, a number of times\text{By the manufacturer, a number of times}
  4. By the manufacturer only once\text{By the manufacturer only once}
Show me the answer

Answer: 1. By the user, number of times\text{By the user, number of times}

Explanation:

  • RAM allows users to write and rewrite data multiple times.

279. The hexadecimal number for ( (95.5)_{10} ) is:

  1. (5F.8)16(5F.8)_{16}
  2. (2E.F)16(2E.F)_{16}
  3. (9A.B)16(9A.B)_{16}
  4. (5A.4)16(5A.4)_{16}
Show me the answer

Answer: 1. (5F.8)16(5F.8)_{16}

Explanation:

  • The decimal number 95.5 converts to the hexadecimal number 5F.8.

280. The octal equivalent of ( (247)_{10} ) is:

  1. (252)8(252)_8
  2. (367)8(367)_8
  3. (350)8(350)_8
  4. (400)8(400)_8
Show me the answer

Answer: 2. (367)8(367)_8

Explanation:

  • The decimal number 247 converts to the octal number 367.

281. The chief reason why digital computers use complemented subtraction is that it:

  1. Simplifies the circuitry\text{Simplifies the circuitry}
  2. Is a very simple process\text{Is a very simple process}
  3. Can handle negative numbers easily\text{Can handle negative numbers easily}
  4. Avoids direct subtraction\text{Avoids direct subtraction}
Show me the answer

Answer: 3. Can handle negative numbers easily\text{Can handle negative numbers easily}

Explanation:

  • Complemented subtraction simplifies the handling of negative numbers in digital systems.

282. In a positive logic system, logic state 1 corresponds to:

  1. Positive voltage\text{Positive voltage}
  2. Zero voltage level\text{Zero voltage level}
  3. Higher voltage level\text{Higher voltage level}
  4. Lower voltage level\text{Lower voltage level}
Show me the answer

Answer: 3. Higher voltage level\text{Higher voltage level}

Explanation:

  • In positive logic, logic state 1 corresponds to a higher voltage level.

283. The commercially available 8-input multiplexer integrated circuit in the TTL family is:

  1. 74957495
  2. 7415474154
  3. 7415374153
  4. 7415174151
Show me the answer

Answer: 4. 7415174151

Explanation:

  • The 74151 is an 8-input multiplexer in the TTL family.

284. CMOS circuits are extensively used for on-chip computers mainly because of their extremely:

  1. Low power dissipation\text{Low power dissipation}
  2. Large packing density\text{Large packing density}
  3. High noise immunity\text{High noise immunity}
  4. Low cost\text{Low cost}
Show me the answer

Answer: 1. Low power dissipation\text{Low power dissipation}

Explanation:

  • CMOS circuits are preferred for on-chip computers due to their low power consumption.

285. The MSI chip 7474 is:

  1. Dual edge-triggered JK flip-flop (TTL)\text{Dual edge-triggered JK flip-flop (TTL)}
  2. Dual edge-triggered D flip-flop (CMOS)\text{Dual edge-triggered D flip-flop (CMOS)}
  3. Dual edge-triggered D flip-flop (TTL)\text{Dual edge-triggered D flip-flop (TTL)}
  4. Dual edge-triggered JK flip-flop (CMOS)\text{Dual edge-triggered JK flip-flop (CMOS)}
Show me the answer

Answer: 3. Dual edge-triggered D flip-flop (TTL)\text{Dual edge-triggered D flip-flop (TTL)}

Explanation:

  • The 7474 is a dual edge-triggered D flip-flop in the TTL family.

286. Which of the following memories stores the most number of bits?

  1. A 5Mx8 memory\text{A 5Mx8 memory}
  2. A 5Mx4 memory\text{A 5Mx4 memory}
  3. A 1Mx16 memory\text{A 1Mx16 memory}
  4. A 1Mx12 memory\text{A 1Mx12 memory}
Show me the answer

Answer: 1. A 5Mx8 memory\text{A 5Mx8 memory}

Explanation:

  • A 5Mx8 memory stores ( 5 \times 8 = 40 ) million bits, which is the largest among the options.

287. The process of entering data into a ROM is called:

  1. Burning in the ROM\text{Burning in the ROM}
  2. Changing the ROM\text{Changing the ROM}
  3. Programming the ROM\text{Programming the ROM}
  4. Charging the ROM\text{Charging the ROM}
Show me the answer

Answer: 3. Programming the ROM\text{Programming the ROM}

Explanation:

  • The process of entering data into a ROM is called programming.

288. When the set of input data to an even parity generator is 0111, the output will be:

  1. 11
  2. Unpredictable\text{Unpredictable}
  3. 00
  4. Depends on the previous input\text{Depends on the previous input}
Show me the answer

Answer: 3. 00

Explanation:

  • The input 0111 has an odd number of 1s, so the even parity bit is 0.

289. The number 140 in octal is equivalent to:

  1. (96)10(96)_{10}
  2. (90)10(90)_{10}
  3. (86)10(86)_{10}
  4. None of these\text{None of these}
Show me the answer

Answer: 3. (86)10(86)_{10}

Explanation:

  • The octal number 140 converts to the decimal number 96.

290. The NOR gate output will be high if the two inputs are:

  1. 0000
  2. 1010
  3. 0101
  4. 1111
Show me the answer

Answer: 1. 0000

Explanation:

  • A NOR gate outputs 1 only when all inputs are 0.

291. Which of the following is the fastest logic?

  1. ECL\text{ECL}
  2. CMOS\text{CMOS}
  3. TTL\text{TTL}
  4. LSI\text{LSI}
Show me the answer

Answer: 1. ECL\text{ECL}

Explanation:

  • ECL (Emitter-Coupled Logic) is the fastest logic family.

292. How many flip-flops are required to construct a mod-30 counter?

  1. 55
  2. 44
  3. 66
  4. 88
Show me the answer

Answer: 1. 55

Explanation:

  • A mod-30 counter requires 5 flip-flops (since ( 2^5 = 32 \geq 30 )).

293. How many address bits are required to represent a 32K memory?

  1. 10 bits10 \text{ bits}
  2. 14 bits14 \text{ bits}
  3. 12 bits12 \text{ bits}
  4. 16 bits16 \text{ bits}
Show me the answer

Answer: 2. 14 bits14 \text{ bits}

Explanation:

  • A 32K memory requires ( \log_2(32768) = 15 ) bits, but 14 bits are sufficient for 16K, so 15 bits are needed for 32K.

294. The number of control lines for a 16-to-1 multiplexer is:

  1. 22
  2. 33
  3. 44
  4. 55
Show me the answer

Answer: 3. 44

Explanation:

  • A 16-to-1 multiplexer requires 4 control lines (since ( 2^4 = 16 )).

295. Which of the following requires refreshing?

  1. SRAM\text{SRAM}
  2. ROM\text{ROM}
  3. DRAM\text{DRAM}
  4. EPROM\text{EPROM}
Show me the answer

Answer: 3. DRAM\text{DRAM}

Explanation:

  • DRAM (Dynamic RAM) requires periodic refreshing to maintain data.

296. Shifting a register content to the left by one bit position is equivalent to:

  1. Division by two\text{Division by two}
  2. Multiplication by two\text{Multiplication by two}
  3. Addition by two\text{Addition by two}
  4. Subtraction by two\text{Subtraction by two}
Show me the answer

Answer: 2. Multiplication by two\text{Multiplication by two}

Explanation:

  • Shifting left by one bit is equivalent to multiplying the number by 2.

297. For a JK flip-flop with ( J = 1 ) and ( K = 0 ), the output after a clock pulse will be:

  1. 00
  2. High impedance\text{High impedance}
  3. 11
  4. No change\text{No change}
Show me the answer

Answer: 3. 11

Explanation:

  • When ( J = 1 ) and ( K = 0 ), the JK flip-flop sets the output to 1.

298. Convert decimal 153 to octal. The equivalent in octal will be:

  1. (231)8(231)_8
  2. (431)8(431)_8
  3. (331)8(331)_8
  4. None of these\text{None of these}
Show me the answer

Answer: 1. (231)8(231)_8

Explanation:

  • The decimal number 153 converts to the octal number 231.

299. The decimal equivalent of ((1100)2)( (1100)_2 ) is:

  1. 1212
  2. 1818
  3. 1616
  4. 2020
Show me the answer

Answer: 1. 1212

Explanation:

  • The binary number 1100 converts to the decimal number 12.

300. The binary equivalent of ((FA)16)( (FA)_{16} ) is:

  1. 1010111110101111
  2. 1011001110110011
  3. 1111101011111010
  4. None of these\text{None of these}
Show me the answer

Answer: 3. 1111101011111010

Explanation:

  • The hexadecimal number FA converts to the binary number 11111010.
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